➀ ASML's EUV lithography technology achieves extremely high precision, requiring massive resources and a total cost of $2.5 billion. The key technology includes emitting a laser to a tin droplet to produce a plasma light source, which is executed 50,000 times per second, with heat reaching 40 times that of the sun's surface. The EUV machine also relies on ultra-smooth mirrors with extremely high precision.

➁ ASML's technological progress supports Moore's Law, making semiconductors more advanced and helping companies like NVIDIA manufacture complex chips. ASML leads in the lithography field with a deep technological moat that is difficult for other companies to surpass.

➂ The precision (EUV) required costs $2.5 billion, involving 40 shipping containers, 20 trucks, and 3 large jet planes to transport one EUV machine.

➃ The EUV machine's light source involves emitting a laser to a tin droplet about the size of a pollen grain. This process must be executed 50,000 times per second, meaning it occurs every 0.00002 seconds.

➄ ASML's mirrors are incredibly smooth, with the largest flaw being less than one millimeter if the mirrors were as large as Germany.

➅ Moore's Law largely depends on ASML, and continued technological advancement will lead to more advanced semiconductors, enabling chips to execute more complex algorithms.

➆ No one is close to ASML in the lithography field, with their moat on another level.

➀ According to a survey report by KISTEP, South Korea's majority of semiconductor technologies have been surpassed by China.

➁ South Korea's level in high integration and low impedance storage chip technology is 90.9%, lower than China's 94.1%.

➂ South Korea's level in high-performance, low-power artificial intelligence chips is 84.1%, still not reaching China's 88.3%.

➃ South Korea's power semiconductor level is 67.5%, while China's is 79.8%.

➄ Both South Korea and China are at 74.2% in advanced semiconductor packaging technology.

➅ South Korea's semiconductor industry has made significant achievements in the past few decades, especially in the field of storage chips.

➆ China's semiconductor industry has developed rapidly in recent years, surpassing South Korea in many key technology areas.

➀ The traditional CMOS process faces challenges due to the limits of photolithography and the need for new technologies to maintain further development.

➁ FinFET has become the mainstream choice for semiconductor devices, pushing the development of semiconductor processes to 7nm, 5nm, and even 3nm.

➂ FD-SOI, once overlooked, is gaining prominence due to its unique technical characteristics and advantages.

➃ FD-SOI technology is growing rapidly, with the global market size expected to increase from $930 million in 2022 to $4.09 billion in 2027.

➄ FD-SOI technology has advantages such as higher performance, lower power consumption, and better radio frequency performance.

➅ FD-SOI technology is particularly suitable for low-power devices such as mobile phones and IoT.

➆ The development of FD-SOI technology has been driven by key players in the semiconductor industry, with the industry actively promoting the technology's development and expanding its application boundaries.

➀ Two GaN projects in China and India have made significant progress;

➁ Bo Wei Integrated's GaN project is expected to be completed by the end of 2025, with an investment of approximately 2.5 billion yuan;

➂ The project is mainly for GaN microwave circuit research, development, and sales, applying to high-tech fields such as 5G communication;

➃ India's government has allocated 33.4 billion rupees for GaN technology research, and the first GaN power transistor has been developed by a multidisciplinary faculty group at the Indian Institute of Technology.

➀ Intel, TSMC, and Samsung are advancing their processes to 1.8nm (18A) and 1.6nm (16A) with full-gate transistors (Intel calls them RibbonFET) and further to the 14A node.

➁ Imec is researching the next-generation complementary field-effect transistor (CFET) stacked transistors on the process roadmap.

➂ Imec will showcase its CFET standard cell at the 2024 IEEE International Electronic Devices Meeting (IEDM) this week, which includes two rows of CFET with a shared signal wiring wall, reducing the area of logic and SRAM units significantly.

➃ Intel has made breakthroughs in 2D transistor technology using beyond-silicon materials, chip interconnects, and packaging technologies.

➄ Intel's RibbonFET is the company's first new transistor design since the introduction of FinFET 13 years ago and is the company's first full-gate (GAA) transistor.

➀ Tian Cheng Advanced Semiconductor Technology Co., Ltd. achieves breakthroughs in technology development and production;

➁ The company focuses on semiconductor technology innovation and contributes to the development of the integrated circuit industry in Zhuhai and the Greater Bay Area;

➂ The 'Nine Layers' technology platform is unveiled, symbolizing advanced technology and corporate culture, aiming to optimize the wafer ecosystem.

➀ The National Semiconductor Technology Center (NSTC) is a key component of the CHIPS Act, aimed at supporting the leadership of the United States in semiconductor research, design, engineering, and advanced manufacturing.

➁ NSTC will create a public-private partnership to establish an ecosystem that includes government, industry, education, entrepreneurs, and investors.

➂ The goals of NSTC include expanding the U.S. leadership in semiconductor technology, reducing the time and cost from design to commercialization, and building a semiconductor workforce ecosystem.

➀ Hybrid bonding is gaining attention in advanced packaging for its ability to provide the shortest vertical connections between chips with similar or different functions, as well as better thermal, electrical, and reliability results.

➁ Despite some chip manufacturers adopting hybrid bonding in large-scale manufacturing, the high cost of the process makes it unsuitable for mass adoption. Challenges include better copper dimple uniformity, faster wafer-to-chip placement, and better alignment, multiple bonding and debonding carriers (which increase costs), and low-temperature annealing capabilities.

➂ The development of AI chips and modules is a significant driver for hybrid bonding and advanced packaging. High-performance and high prices of these chips help to drive industry development.

➀ The evolution of semiconductor packaging from 1D PCB design to wafer-level 3D hybrid bonding;

➁ The core technologies of 2.5D and 3D packaging, including various interlayer materials;

➂ The advantages and challenges of each technology, such as Si interlayer, organic interlayer, glass interlayer, and Cu-Cu hybrid bonding;

➃ Key market trends like larger interlayer area, panel-level packaging, and glass interlayer adoption;

➄ The importance of HBM hybrid bonding and CPO in enhancing I/O bandwidth and reducing energy consumption;

➅ The significance of advanced packaging in HPC, 5G/6G, and consumer electronics markets.

➀ The China MEMS Manufacturing Conference is an annual industry event in China's MEMS field, having successfully hosted four editions with over 2200 attendees and 175 speakers including academician Jiang Zhuangde.

➁ The fifth conference will be held from October 23-25, 2024, at the Suzhou International Expo Center, focusing on MEMS foundry and manufacturing.

➂ The conference will feature a main venue and three technical forums on automotive chips, optoelectronic materials, and semiconductor equipment. It will bring together 60 industry experts from international giants like SEMI&MSIG, Bosch Sensortec, STMicroelectronics, TDK, Analog Devices, EVG, and AFE, as well as domestic leaders such as CETC, CETC Group, CCID Consulting, Sun芯微电子, Naxin Microelectronics, Goertek Microelectronics, Xiamen Yun Tian, and Jingfang Semiconductor.